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SciMater™ Single-sided Polished Monocrystalline Silicon Wafer (Prime grade)

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  • Description:SciMater™ Single-sided Polished Monocrystalline Silicon Wafer (Prime grade)
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SciMater™ Semiconductor Substrates

SciMater™ Prime Grade Single-Side Polished Monocrystalline Silicon Wafer

High-quality monocrystalline silicon substrates for semiconductor processing, micro- and nanofabrication, photolithography, etching, thin-film deposition, MEMS, sensors, and materials research.

Prime Grade Precision Single-Side Polished 2–6 Inch Options N-Type / P-Type <100>/<111> Custom Parameters Available

Product Overview

SciMater™ Prime Grade Single-Side Polished Monocrystalline Silicon Wafers are manufactured from high-purity single-crystal silicon. One surface is precision chemical-mechanical polished to provide a flat, smooth, process-ready surface, while the back surface is typically lapped, etched, or finished according to the actual production batch.

These wafers are suitable for semiconductor devices, micro- and nanofabrication, thin-film deposition, photolithography, etching, MEMS, sensors, optoelectronics, and university research. Standard options include 2-inch, 3-inch, 4-inch, 5-inch, and 6-inch wafers, with N-type, P-type,<100>,<111>, multiple resistivity ranges, and special thicknesses available.

Prime Grade products emphasize material quality, polished-surface condition, geometric performance, and downstream process compatibility. Electrical parameters, thickness tolerance, TTV, Bow, Warp, and surface specifications are subject to the confirmed order or corresponding batch documentation.

Key Features

Prime Grade Quality Designed for research and microfabrication projects requiring high material purity, surface quality, and geometric performance.
Precision Single-Side Polishing The front surface offers good flatness and smoothness for photolithography, coating, deposition, and etching.
Monocrystalline Silicon Substrate Uniform crystal structure with N-type, P-type,<100>, and<111>options.
Multiple Wafer Sizes Available in common 2–6 inch laboratory and pilot-scale sizes for compatibility with equipment and fixtures.
Customizable Parameters Resistivity, thickness, oxide layer, cutting dimensions, packaging, and inspection documents can be confirmed.
Broad Process Compatibility Suitable for semiconductor, MEMS, sensors, microfluidics, thin-film, and optoelectronic research.

Product Size Comparison

Wafer SizeNominal DiameterProduct GradePolishingConductivity TypeCommon Orientation
2 InchØ50.8 mmPrime GradeSingle-Side PolishedN-Type / P-Type<100>/<111>
3 InchØ76.2 mmPrime GradeSingle-Side PolishedN-Type / P-Type<100>/<111>
4 InchØ100 mmPrime GradeSingle-Side PolishedN-Type / P-Type<100>/<111>
5 InchØ125 mmPrime GradeSingle-Side PolishedN-Type / P-Type<100>/<111>
6 InchØ150 mmPrime GradeSingle-Side PolishedN-Type / P-Type<100>/<111>
Crystal orientation, resistivity, thickness, doping type, ultra-thin or extra-thick options, low- or high-resistivity grades, special flats or notches, and inspection documentation must be confirmed according to the specific batch and order.

Optional Technical Parameters

ParameterAvailable Range or Description
Wafer MaterialHigh-purity monocrystalline silicon
Product GradePrime Grade
PolishingSingle-side polished; the front is the primary process surface, and the back surface depends on the production batch
Conductivity TypeN-type or P-type; intrinsic undoped options may be confirmed separately
DopantPhosphorus is common for N-type and boron for P-type; final details follow the order or inspection documents
Crystal Orientation<100>and<111>; other orientations may be available upon request
ResistivityLow, standard, and high-resistivity ranges can be evaluated
ThicknessStandard, thin, thick, and custom thickness options
Surface ConditionBare polished silicon by default; SiO₂, Si₃N₄, and metal coatings require separate customization
Orientation FeaturePrimary flat, secondary flat, or notch according to wafer size and batch
Geometric ParametersThickness tolerance, TTV, Bow, and Warp can be confirmed according to project requirements
Cutting ServicesSquare, rectangular, circular, laser-scribed, special-shaped, and drilled parts
PackagingSingle-wafer box, multi-wafer box, vacuum packaging, clean bag, or customized packaging
Inspection DocumentsBatch labels, parameter sheets, or inspection reports subject to actual supply conditions

TTV describes wafer thickness uniformity, while Bow and Warp describe the wafer's overall curvature and flatness. For high-precision photolithography, bonding, or device fabrication, acceptable limits should be clearly specified before ordering.

Prime Grade vs. Standard Laboratory / Test Grade

Comparison ItemPrime Grade SSP Silicon WaferStandard Laboratory / Test Grade Wafer
Product PositioningSemiconductor processing, device fabrication, and demanding research projectsTeaching demonstrations, equipment setup, and general materials experiments
Surface QualityHigher requirements for polished-surface quality and surface conditionMay contain minor scratches, particles, or cosmetic defects
Geometric PerformanceGreater emphasis on thickness, TTV, Bow, and WarpRelatively relaxed geometric requirements
Parameter CompletenessSize, orientation, type, resistivity, and thickness are generally specifiedSome products may be parameter-unknown or reclaimed/process wafers
Process CompatibilitySuitable for lithography, etching, deposition, oxidation, and device fabricationSuitable for non-critical experiments or equipment testing
Purchase CostRelatively higherRelatively lower

Main Applications

1. Semiconductor Devices and Integrated Circuits Base substrates for diodes, transistors, MOS devices, test structures, and other microelectronic devices.
2. Photolithography and Micro-/Nanofabrication Suitable for photoresist spin coating, exposure, development, wet etching, dry etching, and pattern transfer.
3. Thin-Film Deposition Compatible with magnetron sputtering, thermal evaporation, electron-beam evaporation, CVD, ALD, and spin coating.
4. MEMS and Sensor Fabrication Used for pressure sensors, microheaters, microelectrodes, micromechanical structures, and biosensors.
5. Optoelectronics and Optical Research Suitable for photodetectors, micro-/nano-optical structures, reflective films, filters, and photonic devices.
6. Microfluidics and Lab-on-a-Chip Can be used for microchannels and lab-on-a-chip platforms after lithography, etching, bonding, or surface modification.
7. Materials Characterization and Thin-Film Testing Substrates for Raman, XRD, SEM, AFM, ellipsometry, film-thickness, and contact-angle measurements.
8. Two-Dimensional Materials and Interface Research Used for 2D material transfer, heterojunction fabrication, surface modification, and interfacial bonding studies.

Selection Guide

Application RequirementRecommended Selection
General material deposition, lithography, or teaching2-inch or 3-inch Prime Grade SSP wafer
Standard micro-/nanofabrication and equipment compatibility4-inch Prime Grade SSP wafer
Pilot-scale processing or larger-area thin films5-inch or 6-inch Prime Grade SSP wafer
MOS, oxide-layer, or interface researchConfirm conductivity type, orientation, resistivity, and surface oxidation condition
Wet etching or orientation-dependent processingSelect<100>or<111>according to the etching process
Electrodes and electrical devicesChoose N-type or P-type according to the device design and confirm the resistivity range
High insulation or low-background-current testingChoose high-resistivity or intrinsic undoped silicon wafers
Thin-film characterization or small-area experimentsPurchase full wafers for in-house dicing or order custom-cut pieces
High-precision lithography or wafer bondingConfirm TTV, Bow, Warp, particle level, and surface-quality requirements

How to Use

1 Incoming Inspection Verify size, orientation, conductivity type, resistivity, and thickness; inspect packaging, edge chips, cracks, scratches, and contamination.
2 Clean Handling Wear powder-free gloves or finger cots and use a clean vacuum wand to handle the back surface or a non-critical area.
3 Cleaning and Surface Preparation Select cleaning, dehydration, native-oxide removal, or surface-activation procedures according to the downstream process.
4 Photoresist Coating and Lithography Center the wafer on the spin coater, confirm stable vacuum holding, and proceed with coating, exposure, and development.
5 Coating and Deposition Confirm wafer size, stage, and fixture compatibility; validate surface pretreatment on a small sample when necessary.
6 Etching Select wet or dry etching and protection methods according to crystal orientation, mask material, and target structure.
7 Dicing and Cutting Diamond scribing, mechanical dicing, or laser cutting may be used while controlling edge chipping, particles, and surface damage.
8 Sealed Storage Return unused products to a wafer box or clean package, keep them dry and dust-free, and retain batch identification.
When strong acids, strong alkalis, strong oxidizers, or other corrosive chemicals are involved, follow all applicable laboratory safety procedures and allow only trained personnel to operate in compliant facilities.

Storage and Maintenance

ItemRecommendation
Storage EnvironmentKeep dry and clean; avoid high humidity, high temperatures, and corrosive gases
PackagingKeep unused wafers in the original package, wafer box, or clean vacuum bag
Surface ProtectionPrevent the polished surface from rubbing against hard objects, plastic debris, or paper fibers
Handling and TransportUse wafer boxes or dedicated carriers; avoid stacking bare wafers
Opened PackagesUse promptly after opening; reseal remaining wafers and retain batch information
Long-Term StorageUse a clean, dry cabinet and minimize repeated opening to reduce particle contamination
Process RecordsRecord batch number, specifications, cleaning method, and process conditions for traceability

Bare silicon develops a native oxide layer after exposure to air. For experiments sensitive to interface chemistry, surface condition, or ultrathin-film deposition, define the cleaning, oxide-removal, and surface-pretreatment procedure in advance.

Recommended Ordering Information

To improve product selection and order confirmation efficiency, provide your requirements in the following format:

Size + Polishing + Conductivity Type + Crystal Orientation + Resistivity + Thickness + Quantity + Special Requirements

Example: 4 inch + single-side polished + P-type +<100>+ 1–10 Ω·cm + standard thickness + 25 wafers + individually packed

For custom cutting, also provide: cut size + thickness + cutting method + quantity + dimensional tolerance + cleaning requirement + packaging requirement.

FAQ

1. What does Prime Grade mean?

Prime Grade generally refers to high-quality polished monocrystalline silicon wafers intended for semiconductor devices, integrated circuits, and demanding research processes. The grade emphasizes material quality, polished-surface condition, geometric performance, and parameter completeness.

SciMater™ Prime Grade Single-Side Polished Silicon Wafer Price List

Size × Thickness × Conductivity Type × Crystal Orientation Price Matrix

N-type and P-type wafers are offered at the same price. Select the required size and crystal orientation from the table below.

Product Grade: Prime Grade Polishing: Single-Side Polished Conductivity Type: N-Type / P-Type Crystal Orientation:<100>/<110>/<111> Price Unit: USD / Wafer
Product SeriesSize and ThicknessConductivity Type<100>Orientation<110>Orientation<111>Orientation
Square Silicon Pieces Prime Grade SSP Square Pieces N-type, P-type, and three common crystal orientations are available.10 mm × 10 mm, 1 mm ThickN-Type or P-Type$14$14$14
10 mm × 10 mm, 2 mm ThickN-Type or P-Type$17$17$17
20 mm × 20 mm, 1 mm ThickN-Type or P-Type$20$20$20
20 mm × 20 mm, 2 mm ThickN-Type or P-Type$38$38$38
Full Wafers Prime Grade SSP Full Wafers Available from 1 to 8 inches. N-type and P-type wafers are offered at the same price.1 Inch (Ø25.4 mm)N-Type or P-Type$24$24$24
2 Inch (Ø50.8 mm)N-Type or P-Type$42$42$42
3 Inch (Ø76.2 mm)N-Type or P-Type$26$26$26
4 Inch (Ø100 mm)N-Type or P-Type$74$74$74
5 Inch (Ø125 mm)N-Type or P-Type$63$63$63
6 Inch (Ø150 mm)N-Type or P-Type$38$38$38
8 Inch (Ø200 mm)N-Type or P-Type$78$78$78
Selection method: first choose a square-cut piece or a full wafer, then confirm the conductivity type and crystal orientation. For the same size, N-type and P-type wafers in<100>,<110>, and<111>orientations are offered at the same price. USD prices are calculated as CNY prices divided by 5.

International Orders & Contact

Email: contact@scimaterials.cn
Phone: +86 130-0303-8751 / +86 156-0553-2352
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Store: SCI Materials Hub

Partial references citing our materials (from Google Scholar)


Carbon Dioxide Reduction

1. ACS Nano Strain Relaxation in Metal Alloy Catalysts Steers the Product Selectivity of Electrocatalytic CO2 Reduction

The bipolar membrane (Fumasep FBM) in this paper was purchased from SCI Materials Hub, which was used in rechargeable Zn-CO2 battery tests. The authors reported a strain relaxation strategy to determine lattice strains in bimetal MNi alloys (M = Pd, Ag, and Au) and realized an outstanding CO2-to-CO Faradaic efficiency of 96.6% with outstanding activity and durability toward a Zn-CO2 battery.


2. Front. Chem. Boosting Electrochemical Carbon Dioxide Reduction on Atomically Dispersed Nickel Catalyst

In this paper, Vulcan XC-72R was purchased from SCI Materials Hub. Vulcan XC 72R carbon is the most common catalyst support used in the anode and cathode electrodes of Polymer Electrolyte Membrane Fuel Cells (PEMFC), Direct Methanol Fuel Cells (DMFC), Alkaline Fuel Cells (AFC), Microbial Fuel Cells (MFC), Phosphoric Acid Fuel Cells (PAFC), and many more!


3. Adv. Mater. Partially Nitrided Ni Nanoclusters Achieve Energy-Efficient Electrocatalytic CO2 Reduction to CO at Ultralow Overpotential

An AEM membrane (Sustainion X37-50 Grade RT, purchased from SCI Materials Hub) was activated in 1 M KOH for 24 h, washed with ultra-purity water prior to use.


4. Adv. Funct. Mater. Nanoconfined Molecular Catalysts in Integrated Gas Diffusion Electrodes for High-Current-Density CO2 Electroreduction

In this paper (Supporting Information), an anion exchanged membrane (Fumasep FAB-PK-130 obtained from SCI Materials Hub (www.scimaterials.cn)) was used to separate the catholyte and anolyte chambers.

SCI Materials Hub: we also recommend our Fumasep FAB-PK-75 for the use in a flow cell.


5. Appl. Catal. B Efficient utilization of nickel single atoms for CO2 electroreduction by constructing 3D interconnected nitrogen-doped carbon tube network

In this paper, the Nafion 117 membrane was obtained from SCI Materials Hub.


6. Vacuum Modulable Cu(0)/Cu(I)/Cu(II) sites of Cu/C catalysts derived from MOF for highly selective CO2 electroreduction to hydrocarbons

In this paper, Proton exchange membrane (Nafion 117), Nafion D520, and Toray 060 carbon paper were purchased from SCI Materials Hub.


7. National Science Review Confinement of ionomer for electrocatalytic CO2 reduction reaction via efficient mass transfer pathways

An anion exchange membrane (PiperION-A15-HCO3) was obtained from SCI Materials Hub.


8. Catalysis Communications Facilitating CO2 electroreduction to C2H4 through facile regulating {100} & {111} grain boundary of Cu2O

Carbon paper (TGPH060), membrane solution (Nafion D520), and ionic membrane (Nafion N117) were obtained from Wuhu Eryi Material Technology Co., Ltd (a company under SCI Materials Hub).


Batteries

1. J. Mater. Chem. A Blocking polysulfides with a Janus Fe3C/N-CNF@RGO electrode via physiochemical confinement and catalytic conversion for high-performance lithium–sulfur batteries

Graphene oxide (GO) in this paper was obtained from SCI Materials Hub. The authors introduced a Janus Fe3C/N-CNF@RGO electrode consisting of 1D Fe3C decorated N-doped carbon nanofibers (Fe3C/N-CNFs) side and 2D reduced graphene oxide (RGO) side as the free-standing carrier of Li2S6 catholyte to improve the overall electrochemical performance of Li-S batteries.


2. Joule A high-voltage and stable zinc-air battery enabled by dual-hydrophobic-induced proton shuttle shielding

This paper used more than 10 kinds of materials from SCI Materials Hub and the authors gave detailed properity comparsion.

The commercial IEMs of Fumasep FAB-PK-130 and Nafion N117 were obtained from SCI Materials Hub.

Gas diffusion layers of GDL340 (CeTech) and SGL39BC (Sigracet) and Nafion dispersion (Nafion D520) were obtained from SCI Materials Hub.

Zn foil (100 mm thickness) and Zn powder were obtained from the SCI Materials Hub.

Commercial 20% Pt/C, 40% Pt/C and IrO2 catalysts were also obtained from SCI Materials Hub.


3. Journal of Energy Chemistry Vanadium oxide nanospheres encapsulated in N-doped carbon nanofibers with morphology and defect dual-engineering toward advanced aqueous zinc-ion batteries

In this paper, carbon cloth (W0S1011) was obtained from SCI Materials Hub. The flexible carbon cloth matrix guaranteed the stabilization of the electrode and improved the conductivity of the cathode.


4. Energy Storage Materials Defect-abundant commercializable 3D carbon papers for fabricating composite Li anode with high loading and long life

The 3D carbon paper (TGPH060 raw paper) were purchased from SCI Materials Hub.


5. Nanomaterials A Stable Rechargeable Aqueous Zn–Air Battery Enabled by Heterogeneous MoS2 Cathode Catalysts

Nafion D520 (5 wt%), and carbon paper (GDL340) were received from SCI-Materials-Hub.


6. SSRN An Axially Directed Cobalt-Phthalocyanine Covalent Organic Polymer as High-Efficient Bifunctional Catalyst for Zn-Air Battery

Carbon cloth (W0S1011) and other electrochemical consumables required for air cathode were provided by SCI Materials Hub.


Oxygen Reduction Reaction

1. J. Chem. Eng. Superior Efficiency Hydrogen Peroxide Production in Acidic Media through Epoxy Group Adjacent to Co-O/C Active Centers on Carbon Black

In this paper, Vulcan XC 72 carbon black, ion membrane (Nafion N115, 127 μL), Nafion solution (D520, 5 wt%), and carbon paper (AvCarb GDS 2230 and Spectracarb 2050A-1050) were purchased from SCI Materials Hub.


2. Journal of Colloid and Interface Science Gaining insight into the impact of electronic property and interface electrostatic field on ORR kinetics in alloy engineering via theoretical prognostication and experimental validation

The 20 wt% Pt3M (M = Cr, Co, Cu, Pd, Sn, and Ir) were purchased from SCI Materials Hub. This work places emphasis on the kinetics of the ORR concerning Pt3M (M = Cr, Co, Cu, Pd, Sn, and Ir) catalysts, and integrates theoretical prognostication and experimental validation to illuminate the fundamental principles of alloy engineering.


Water Electrolysis

1. International Journal of Hydrogen Energy Gold as an efficient hydrogen isotope separation catalyst in proton exchange membrane water electrolysis

The cathodic catalysts of Pt/C (20 wt%, 2–3 nm) and Au/C (20 wt%, 4–5 nm) were purchased from SCI Materials Hub.


2. Small Science Silver Compositing Boosts Water Electrolysis Activity and Durability of RuO2 in a Proton-Exchange-Membrane Water Electrolyzer

Two fiber felts (0.35 mm thickness, SCI Materials Hub) were used as the porous transport layers at both the cathode and the anode.


3. Advanced Functional Materials Hierarchical Crystalline/Amorphous Heterostructure MoNi/NiMoOx for Electrochemical Hydrogen Evolution with Industry-Level Activity and Stability

Anion-exchange membrane (FAA-3-PK-130) was obtained from SCI Materials Hub website.


Fuel Cells

1. Polymer Sub-two-micron ultrathin proton exchange membrane with reinforced mechanical strength

Gas diffusion electrode (60% Pt/C, Carbon paper) was purchased from SCI Materials Hub.


Characterization

1. Chemical Engineering Journal Electrochemical reconstitution of Prussian blue analogue for coupling furfural electro-oxidation with photo-assisted hydrogen evolution reaction

An Au nanoparticle film was deposited on the total reflecting plane of a single reflection ATR crystal (SCI Materials Hub, Wuhu, China) via sputter coater.

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