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SciMater™ Thermally Oxidized Silicon Wafer (Single-throw Hydrogen Peroxide)

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  • Description:SciMater™ Thermally Oxidized Silicon Wafer (Single-throw Hydrogen Peroxide)
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SciMater™ THERMAL OXIDE WAFER

SciMater™ SiO₂ Thermal Oxide Silicon Wafers

Monocrystalline silicon substrates with thermally grown silicon dioxide layers. Available as SSP single-side oxide, SSP double-side oxide, intrinsic SSP double-side oxide, and DSP double-side oxide products, including full wafers, circular pieces, square pieces, and customized cutting options.

SSP Single-Side Oxide SSP Double-Side Oxide Intrinsic Silicon Substrate DSP Double-Side Oxide 10 nm–7 μm Oxide Layer Full Wafers & Cut Pieces

Product Overview

SciMater™ SiO₂ Thermal Oxide Silicon Wafers use monocrystalline silicon as the substrate. A dense silicon dioxide layer is grown directly on the silicon surface through high-temperature thermal oxidation. Compared with deposited oxide films, thermally grown SiO₂ forms a strongly bonded interface with the silicon substrate and can function as an electrical insulation layer, dielectric layer, process mask, protective layer, or optical interference layer.

“Single-side oxide” indicates that the main functional side uses a single-side oxide structure, while “double-side oxide” indicates oxide layers on both wafer surfaces. “SSP” and “DSP” refer to single-side-polished and double-side-polished silicon substrates. Crystal orientation, conductivity type, resistivity, wafer-thickness tolerance, oxide-thickness tolerance, and surface grade are subject to the confirmed order or batch documentation.
Thermally Grown SiO₂

The oxide layer is tightly bonded to silicon and is suitable for insulation, dielectric, protective, and masking applications.

Wide Oxide-Thickness Range

Available specifications cover 10 nm, 20 nm, 50 nm, 100 nm, 285 nm, 300 nm, and up to 7 μm.

Full Wafers and Small Pieces

Available as 2–6 inch full wafers, Ø10–Ø20 mm circular pieces, and common square-cut pieces.

Custom Processing

Cutting dimensions, scribing format, substrate parameters, and oxide thickness may be confirmed according to project needs.

Core Product Specification Comparison

The table below combines the principal product structures, full-wafer sizes, oxide-thickness options, cut-piece formats, and recommended applications.

Product TypePolishingOxide StructureFull-Wafer SizesOxide ThicknessCut-Piece OptionsCore FeatureRecommended Applications
SSP Single-Side Oxide WaferSSPSingle-Side Oxide
2 Inch4 Inch6 Inch
20 nm50 nm100 nm200 nm285 nm300 nm500 nm1000 nm2000 nm
Ø10/15/20 mm; 5×5, 10×10, 15×15, and 20×20 mmA clearly defined functional surface with a back side suitable for routine handling and mounting.Thin-film deposition, 2D-material transfer, surface modification, and teaching experiments.
SSP Double-Side Oxide WaferSSPDouble-Side Oxide
2 Inch4 Inch5 Inch6 Inch
10 nm20 nm50 nm100 nm200 nm285 nm300 nm500 nm1000 nm2000 nm3 μm5 μm7 μm
Ø10/15/20 mm; 5×5, 10×10, 15×15, and 20×20 mmOxide on both sides for double-sided insulation and surface protection.Micro-/nanofabrication, insulating substrates, wet processing, and double-side protection structures.
Intrinsic SSP Double-Side Oxide WaferIntrinsic SSPDouble-Side Oxide
4 Inch
100 nm285 nm300 nm
Confirmed by orderIntrinsic silicon substrate for reducing conductive-substrate interference in measurements.Electrical testing, RF research, dielectric studies, and 2D-material devices.
DSP Double-Side Oxide WaferDSPDouble-Side OxideCurrently supplied as circular cut pieces
7 μm
Ø10 mm circular pieceDouble-side polished and double-side oxidized for applications requiring flat functional surfaces on both sides.Double-sided processing, optical experiments, precision mounting, and specialized device structures.
SSP Single-Side Oxide Square PiecesSSPSingle-Side OxideCut from 4-inch wafersConfirmed by order10×10 mm; other dimensions customizableProvides ready-to-use small pieces and reduces secondary dicing operations.Chip experiments, material deposition, sample support, and compact fixtures.
SSP Single-Side Oxide Laser-Scribed WaferSSPSingle-Side Oxide4-inch laser-scribed waferDimensions and oxide thickness customizableStandard 10×10 mm scribing patternAllows customers to separate samples along the scribe lines while retaining full-wafer shipping protection.Batch experiments, teaching samples, manual separation, and process verification.
Specifications are consolidated from currently available product information. Not every wafer size is available with every oxide thickness. Confirm the actual size–thickness combination, stock status, tolerance, and customization capability before ordering.

Oxide-Thickness Selection

10–50 nm Thin Oxide

Suitable for interface studies, surface passivation, thin dielectric layers, and experiments sensitive to oxide thickness.

100–300 nm General-Purpose Oxide

Suitable for micro-/nanofabrication, 2D-material observation, thin-film deposition, and routine insulating-substrate applications.

500–2000 nm Medium-Thick Oxide

Suitable for enhanced insulation, improved surface isolation, and selected etch-mask applications.

3–7 μm Thick Oxide

Suitable for structures requiring thick electrical insulation, deep-etch masks, or specialized microfabrication.

285 nm and 300 nm

Commonly used for optical observation and transfer of graphene, 2D materials, and ultrathin flakes.

Custom Oxide Thickness

Specify wafer size, substrate type, polishing, target oxide thickness, tolerance, and quantity.

Main Applications

2D-Material Transfer

For graphene, MXene, MoS₂, and other 2D-material transfer, alignment, and optical identification.

Thin-Film Deposition

Compatible with evaporation, sputtering, spin coating, chemical deposition, and solution-based film preparation.

Micro-/Nanofabrication

Suitable for photolithography, etching, masking, patterning, and microdevice process verification.

Electrical Insulation Substrate

The SiO₂ layer isolates the silicon substrate and provides an insulating surface for electrodes, sensors, and devices.

Surface Modification

Suitable for silanization, wetting control, molecular functionalization, and biointerface studies.

Optical Research

Different oxide thicknesses produce different interference colors for observing transparent or ultrathin materials.

Sensor Devices

Useful as a base substrate for gas, pressure, biological, and electrochemical sensors.

Research and Teaching

Suitable for semiconductor processing, materials preparation, thin-film analysis, and microfabrication education.

Product Selection Guide

Front-Side Processing Only

Choose an SSP single-side oxide wafer for straightforward front-side deposition, coating, and optical observation.

Double-Side Insulation Required

Choose an SSP double-side oxide wafer to reduce back-side conduction or contamination effects.

Low-Conductivity Substrate Required

Choose an intrinsic SSP double-side oxide wafer and confirm the required resistivity before purchase.

Flat Functional Surfaces on Both Sides

Choose a DSP double-side oxide structure for double-sided processing, transmission testing, or precision mounting.

Micro-Quantity or Small-Area Tests

Choose circular or square cut pieces to reduce full-wafer waste and simplify mounting in small fixtures.

Batch Sample Separation

Choose a laser-scribed wafer so multiple small pieces can be separated along predefined scribe lines.

How to Use

1
Identify the Oxide Surface

Verify the product label, polished surface, and oxide configuration before processing.

2
Handle in a Clean Manner

Wear powder-free gloves and hold the wafer edge with wafer tweezers or a vacuum wand.

3
Remove Loose Particles

Use clean nitrogen to blow the surface and select a compatible cleaning method when needed.

4
Mount the Wafer

Place the wafer flat in the fixture and avoid concentrated edge force or local bending.

5
Perform the Process

Set suitable conditions for deposition, spin coating, transfer, lithography, or etching.

6
Avoid Mechanical Stress

Thick-oxide wafers and cut pieces are brittle; avoid bending, impact, and dropping.

7
Clean After Use

Select a cleaning method compatible with the contaminant and the SiO₂ layer.

8
Store Separately

After cleaning and drying, place the sample in a wafer box or clean sample case.

Use and Storage Precautions

Avoid Direct Touching

Fingerprints and oils can affect film adhesion, wettability, electrical testing, and surface analysis.

Prevent Edge Chipping

Silicon is hard but brittle. Use suitable tweezers and avoid dropping or impact.

Confirm Chemical Compatibility

Fluoride-containing solutions and some strong alkalis can etch SiO₂. Evaluate compatibility before use.

Control Thermal Processing

High temperatures may affect the interface, film stress, and surface state.

Distinguish Front and Back Surfaces

SSP products have different front- and back-surface conditions. Confirm the target surface before processing.

Keep Clean and Dry

Store in a clean, low-particle environment with individual spacers to reduce surface rubbing.

Handle Cut Pieces Carefully

Small circular and square pieces have limited edge area and can break under excessive tweezer pressure.

Confirm Batch Parameters

Request batch documentation when strict oxide thickness, orientation, resistivity, or tolerance limits are required.

FAQ

1. What is a SiO₂ thermal oxide silicon wafer?

It is a monocrystalline silicon wafer processed in a high-temperature oxidizing environment so that a silicon dioxide layer grows on the silicon surface. The oxide can function as an insulation, dielectric, protective, masking, or optical interference layer.

2. What is the difference between single-side and double-side oxide?

Single-side oxide products are primarily intended for front-side experiments. Double-side oxide products have oxide layers on both surfaces for double-sided insulation, protection, or process isolation.

3. How should SSP and DSP be selected?

SSP is generally sufficient when deposition, coating, or material transfer is performed on one surface only. DSP is recommended for double-sided processing, double-sided observation, transmission testing, or applications requiring improved back-surface flatness.

4. What are 285 nm and 300 nm oxide layers used for?

They are commonly used for graphene and other 2D-material transfer and optical observation. Actual visibility also depends on the illumination, microscope, material thickness, and wafer batch.

5. What is the difference between intrinsic and standard silicon substrates?

Intrinsic silicon generally has a lower free-carrier concentration and is useful for electrical, RF, or dielectric studies that are sensitive to substrate conduction. Confirm the required resistivity before ordering.

6. Can oxide wafers be used for photolithography and etching?

Yes. SiO₂ is widely used for pattern transfer, insulation, and etch masking. Process conditions should be selected according to the oxide thickness, etchant, and target structure.

7. Which solutions can etch thermal oxide?

Fluoride-containing solutions can significantly etch SiO₂, and some strong alkaline systems may also affect it. Confirm chemical compatibility and treatment time before cleaning or etching.

8. Can small circular and square pieces be used directly?

Yes. Cut pieces are convenient for small-volume experiments, compact fixtures, film deposition, and material transfer. Inspect the edges and verify stable mounting before use.

9. Can thermal oxide wafers be reused?

Reuse is possible when the oxide has not been etched, scratched, contaminated, or thermally altered and when all residues can be removed. New or dedicated wafers are recommended for high-cleanliness experiments.

10. Which parameters should be confirmed before ordering?

Confirm the product structure, full wafer or cut piece, dimensions, oxide thickness, single- or double-side oxide, SSP or DSP, crystal orientation, conductivity type, resistivity, wafer thickness, quantity, tolerances, and packaging.

Recommended Ordering Information

Recommended Quotation Format

Product type + full wafer or cut piece + dimensions + oxide thickness + single-side/double-side oxide + SSP/DSP + crystal orientation + conductivity type + resistivity + quantity + tolerance or packaging requirements.

Example: SSP double-side oxide wafer + 4 inch + 285 nm SiO₂ + P-type +<100>orientation + specified resistivity + 10 wafers + individual wafer-box packaging.

Product Summary

SciMater™ SiO₂ Thermal Oxide Silicon Wafers include SSP single-side oxide, SSP double-side oxide, intrinsic SSP double-side oxide, DSP double-side oxide, custom-cut pieces, and laser-scribed wafers. Available oxide thicknesses range from 10 nm to 7 μm. These products are suitable for 2D-material transfer, thin-film deposition, micro-/nanofabrication, electrical devices, insulating substrates, optical research, and surface modification. Selection should focus on oxide configuration, polishing, oxide thickness, wafer dimensions, crystal orientation, conductivity type, and resistivity.

Double-Side Oxide Silicon Wafer Price List

Polishing × Size × Oxide Thickness × N/P Type × Crystal Orientation Price Matrix

Covers single-side-polished double-side-oxide and double-side-polished double-side-oxide silicon wafers and cut pieces. All prices are shown in USD.

Product Systems: SSP Double-Side Oxide / DSP Double-Side Oxide Conductivity Type: N-Type / P-Type Crystal Orientation:<100>/<110>/<111> Oxide: SiO₂ Price Unit: USD / Wafer or Piece
Oxide SystemProduct FormSizeOxide Thickness / SpecificationN-Type Double-Side OxideP-Type Double-Side Oxide
<100><110><111><100><110><111>
SSP Double-Side Oxide Specifications
SSP Double-Side Oxide Single-Side Polished · Double-Side Oxidized Square pieces, circular pieces, processed wafers, and 2–8 inch full wafers.Cut Piece5 × 5 mm300 nm$5$5$5$5$5$5
Cut PieceØ10 mm300 nm$6$6$6$6$6$6
Cut Piece10 × 10 mm300 nm$6$6$6$6$6$6
Cut PieceØ15 mm300 nm$8$8$8$8$8$8
Cut Piece15 × 15 mm300 nm$8$8$8$8$8$8
Cut PieceØ20 mm300 nm$10$10$10$10$10$10
Cut Piece20 × 20 mm300 nm$10$10$10$10$10$10
Full Wafer2 InchThickness Not Specified$34$34$34$34$34$34
Full Wafer3 InchThickness Not Specified$57$57$57$57$57$57
Full Wafer4 Inch10 nm$69$69$69$69$69$69
Full Wafer4 Inch20 nm$57$57$57$57$57$57
Full Wafer4 Inch50–2000 nm$42$42$42$42$42$42
Full Wafer4 Inch7 μm$180$180$180$180$180$180
Processed Wafer4 InchApprox. 55 SSP Pieces, 10 × 10 mm Laser-Scribed$52$52$52$52$52$52
Processed Wafer4 InchApprox. 60 SSP Pieces, 10 × 10 mm Diced$61$61$61$61$61$61
Full Wafer5 Inch5 μm$108$108$108$108$108$108
Full Wafer6 Inch3 μm$180$180$180$180$180$180
Full Wafer8 InchThickness Not Specified$116$116$116$116$116$116
DSP Double-Side Oxide Specifications
DSP Double-Side Oxide Double-Side Polished · Double-Side Oxidized Double-side polished circular oxide silicon pieces.Circular PieceØ10 mm7 μm$22$22$22$22$22$22
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Partial references citing our materials (from Google Scholar)


Carbon Dioxide Reduction

1. ACS Nano Strain Relaxation in Metal Alloy Catalysts Steers the Product Selectivity of Electrocatalytic CO2 Reduction

The bipolar membrane (Fumasep FBM) in this paper was purchased from SCI Materials Hub, which was used in rechargeable Zn-CO2 battery tests. The authors reported a strain relaxation strategy to determine lattice strains in bimetal MNi alloys (M = Pd, Ag, and Au) and realized an outstanding CO2-to-CO Faradaic efficiency of 96.6% with outstanding activity and durability toward a Zn-CO2 battery.


2. Front. Chem. Boosting Electrochemical Carbon Dioxide Reduction on Atomically Dispersed Nickel Catalyst

In this paper, Vulcan XC-72R was purchased from SCI Materials Hub. Vulcan XC 72R carbon is the most common catalyst support used in the anode and cathode electrodes of Polymer Electrolyte Membrane Fuel Cells (PEMFC), Direct Methanol Fuel Cells (DMFC), Alkaline Fuel Cells (AFC), Microbial Fuel Cells (MFC), Phosphoric Acid Fuel Cells (PAFC), and many more!


3. Adv. Mater. Partially Nitrided Ni Nanoclusters Achieve Energy-Efficient Electrocatalytic CO2 Reduction to CO at Ultralow Overpotential

An AEM membrane (Sustainion X37-50 Grade RT, purchased from SCI Materials Hub) was activated in 1 M KOH for 24 h, washed with ultra-purity water prior to use.


4. Adv. Funct. Mater. Nanoconfined Molecular Catalysts in Integrated Gas Diffusion Electrodes for High-Current-Density CO2 Electroreduction

In this paper (Supporting Information), an anion exchanged membrane (Fumasep FAB-PK-130 obtained from SCI Materials Hub (www.scimaterials.cn)) was used to separate the catholyte and anolyte chambers.

SCI Materials Hub: we also recommend our Fumasep FAB-PK-75 for the use in a flow cell.


5. Appl. Catal. B Efficient utilization of nickel single atoms for CO2 electroreduction by constructing 3D interconnected nitrogen-doped carbon tube network

In this paper, the Nafion 117 membrane was obtained from SCI Materials Hub.


6. Vacuum Modulable Cu(0)/Cu(I)/Cu(II) sites of Cu/C catalysts derived from MOF for highly selective CO2 electroreduction to hydrocarbons

In this paper, Proton exchange membrane (Nafion 117), Nafion D520, and Toray 060 carbon paper were purchased from SCI Materials Hub.


7. National Science Review Confinement of ionomer for electrocatalytic CO2 reduction reaction via efficient mass transfer pathways

An anion exchange membrane (PiperION-A15-HCO3) was obtained from SCI Materials Hub.


8. Catalysis Communications Facilitating CO2 electroreduction to C2H4 through facile regulating {100} & {111} grain boundary of Cu2O

Carbon paper (TGPH060), membrane solution (Nafion D520), and ionic membrane (Nafion N117) were obtained from Wuhu Eryi Material Technology Co., Ltd (a company under SCI Materials Hub).


Batteries

1. J. Mater. Chem. A Blocking polysulfides with a Janus Fe3C/N-CNF@RGO electrode via physiochemical confinement and catalytic conversion for high-performance lithium–sulfur batteries

Graphene oxide (GO) in this paper was obtained from SCI Materials Hub. The authors introduced a Janus Fe3C/N-CNF@RGO electrode consisting of 1D Fe3C decorated N-doped carbon nanofibers (Fe3C/N-CNFs) side and 2D reduced graphene oxide (RGO) side as the free-standing carrier of Li2S6 catholyte to improve the overall electrochemical performance of Li-S batteries.


2. Joule A high-voltage and stable zinc-air battery enabled by dual-hydrophobic-induced proton shuttle shielding

This paper used more than 10 kinds of materials from SCI Materials Hub and the authors gave detailed properity comparsion.

The commercial IEMs of Fumasep FAB-PK-130 and Nafion N117 were obtained from SCI Materials Hub.

Gas diffusion layers of GDL340 (CeTech) and SGL39BC (Sigracet) and Nafion dispersion (Nafion D520) were obtained from SCI Materials Hub.

Zn foil (100 mm thickness) and Zn powder were obtained from the SCI Materials Hub.

Commercial 20% Pt/C, 40% Pt/C and IrO2 catalysts were also obtained from SCI Materials Hub.


3. Journal of Energy Chemistry Vanadium oxide nanospheres encapsulated in N-doped carbon nanofibers with morphology and defect dual-engineering toward advanced aqueous zinc-ion batteries

In this paper, carbon cloth (W0S1011) was obtained from SCI Materials Hub. The flexible carbon cloth matrix guaranteed the stabilization of the electrode and improved the conductivity of the cathode.


4. Energy Storage Materials Defect-abundant commercializable 3D carbon papers for fabricating composite Li anode with high loading and long life

The 3D carbon paper (TGPH060 raw paper) were purchased from SCI Materials Hub.


5. Nanomaterials A Stable Rechargeable Aqueous Zn–Air Battery Enabled by Heterogeneous MoS2 Cathode Catalysts

Nafion D520 (5 wt%), and carbon paper (GDL340) were received from SCI-Materials-Hub.


6. SSRN An Axially Directed Cobalt-Phthalocyanine Covalent Organic Polymer as High-Efficient Bifunctional Catalyst for Zn-Air Battery

Carbon cloth (W0S1011) and other electrochemical consumables required for air cathode were provided by SCI Materials Hub.


Oxygen Reduction Reaction

1. J. Chem. Eng. Superior Efficiency Hydrogen Peroxide Production in Acidic Media through Epoxy Group Adjacent to Co-O/C Active Centers on Carbon Black

In this paper, Vulcan XC 72 carbon black, ion membrane (Nafion N115, 127 μL), Nafion solution (D520, 5 wt%), and carbon paper (AvCarb GDS 2230 and Spectracarb 2050A-1050) were purchased from SCI Materials Hub.


2. Journal of Colloid and Interface Science Gaining insight into the impact of electronic property and interface electrostatic field on ORR kinetics in alloy engineering via theoretical prognostication and experimental validation

The 20 wt% Pt3M (M = Cr, Co, Cu, Pd, Sn, and Ir) were purchased from SCI Materials Hub. This work places emphasis on the kinetics of the ORR concerning Pt3M (M = Cr, Co, Cu, Pd, Sn, and Ir) catalysts, and integrates theoretical prognostication and experimental validation to illuminate the fundamental principles of alloy engineering.


Water Electrolysis

1. International Journal of Hydrogen Energy Gold as an efficient hydrogen isotope separation catalyst in proton exchange membrane water electrolysis

The cathodic catalysts of Pt/C (20 wt%, 2–3 nm) and Au/C (20 wt%, 4–5 nm) were purchased from SCI Materials Hub.


2. Small Science Silver Compositing Boosts Water Electrolysis Activity and Durability of RuO2 in a Proton-Exchange-Membrane Water Electrolyzer

Two fiber felts (0.35 mm thickness, SCI Materials Hub) were used as the porous transport layers at both the cathode and the anode.


3. Advanced Functional Materials Hierarchical Crystalline/Amorphous Heterostructure MoNi/NiMoOx for Electrochemical Hydrogen Evolution with Industry-Level Activity and Stability

Anion-exchange membrane (FAA-3-PK-130) was obtained from SCI Materials Hub website.


Fuel Cells

1. Polymer Sub-two-micron ultrathin proton exchange membrane with reinforced mechanical strength

Gas diffusion electrode (60% Pt/C, Carbon paper) was purchased from SCI Materials Hub.


Characterization

1. Chemical Engineering Journal Electrochemical reconstitution of Prussian blue analogue for coupling furfural electro-oxidation with photo-assisted hydrogen evolution reaction

An Au nanoparticle film was deposited on the total reflecting plane of a single reflection ATR crystal (SCI Materials Hub, Wuhu, China) via sputter coater.

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